edited by P J Edwards (Univ. Edinburgh) & A F Murray (Univ. Edinburgh)

Hardware inaccuracy and imprecision are important considerations when implementing neural algorithms. This book presents a study of synaptic weight noise as a typical fault model for analogue VLSI realisations of MLP neural networks and examines the implications for learning and network performance. The aim of the book is to present a study of how including an imprecision model into a learning scheme as a“fault tolerance hint” can aid understanding of accuracy and precision requirements for a particular implementation. In addition the study shows how such a scheme can give rise to significant performance enhancement.

• Introduction
• Neural Network Performance Metrics
• Noise in Neural Implementations
• Simulation Requirements and Environment
• Fault Tolerance
• Generalisation Ability
• Learning Trajectory and Speed
• Penalty Terms for Fault Tolerance
• Conclusions
• Fault Tolerance Hints — The General Case
• Bibliography
• Index