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    LOW POWER VLSI DESIGN AND TECHNOLOGY

    edited by G K Yeap (Motorola) & F N Najm (Univ. Illinois, Urban–Champaign)

    Low-power and low-energy VLSI has become an important issue in today's consumer electronics.

    This book is a collection of pioneering applied research papers in low power VLSI design and technology.

    A comprehensive introductory chapter presents the current status of the industry and academic research in the area of low power VLSI design and technology.

    Other topics cover logic synthesis, floorplanning, circuit design and analysis, from the perspective of low power requirements.

    The readers will have a sampling of some key problems in this area as the low power solutions span the entire spectrum of the design process. The book also provides excellent references on up-to-date research and development issues with practical solution techniques.

     
    Contents:
    • Introduction to Low-Power VLSI Design (G Yeap & A Wild)
    • Low Power Design of Off-Chip Drivers and Transmission Lines: A Branch and Bound Approach (R Gupta et al.)
    • A New CMOS Driver Model for Transient Analysis and Power Dissipation Analysis (H Liao et al.)
    • On the Optimal Drivers of High-Speed Low Power ICs (D Zhou & X Y Liu)
    • Floorplan Design with Low Power Considerations (K-Y Chao & D F Wong)
    • Retiming Sequential Circuits for Low Power (J Monteiro et al.)
     
    Readership: Electrical engineers.
     


     
    128pp    Pub. date: Aug 1996  
    ISBN:   978-981-02-2518-6
    981-02-2518-0
       US$52 / £39

     


     

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    Updated on 20 November 2009